PCI Bus Specification allows for arbitration among connected devices to allocate access to the shared system bus resources. Typically, arbiters provide requesting devices access to the shared PCI bus and use some form of Round Robin or Weighted Round Robin algorithms.
In a weighted round-robin scheme, for any given connection between a master and slave, the amount of access each master has to a given slave can be selected.
In a fairness-based arbitration scheme, each master-slave pair has an integer value of “shares” for bus transfers. If conflicting requests to access a particular slave occur, the master that has the highest fairness setting is granted access to the slave. After the master-slave pair exhausts its share assignment, control of the slave is granted to the master-slave pairs with lower share assignments. A fairness based arbitration scheme tries to prevent starvation.
For example, if master A, a DMA controller, has 1 share of access to a RAM slave port and master B, the a processor, has 2 shares of access to the same RAM slave port, the DMA controller can access the slave 33% of the time (assuming both masters continually request transfers to the shared slave). The arbitration settings do not have to be sequential values. For example, an arbitration setting of 9 for one master, and 1 for another allots 90% and 10% access, respectively.
These allocation methods monitor and use the arbitration signals specified in the PCI specification, REQ#, FRAME#, IRDY#, which indicate the beginning and end of a bus transaction.
The standard Round Robin technique does not dynamically allocate access to the bus to take into account the different bandwidth requirements of devices that are latency sensitive and devices with high traffic flows. For example, a device implementing iscochronous traffic, such as voice over IP (VoIP) requires low-latency access to the bus to maintain voice quality. However, this device does may not be a high traffic device so it doesn't need to consume much of the total bus bandwidth. On the other hand, a high traffic device, such as a PCI bridge is not as latency sensitive but needs to be allocated more bus bandwidth. Compounding the problem is the unpredictable nature of bus access requests which makes static systems inefficient. In a round robin system low-latency devices may be kept off the bus for too long and high-traffic devices may not be allocated enough bus cycles. For example, in the round robin example described above, the bandwidth is allocated statically between the two devices but there is not provision for low-latency access.
Accordingly, new bus arbitration techniques are required to dynamically balance the conflicting needs of high traffic devices and low latency devices.